 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| APU3039 1 data and specifications subject to change without notice. description the APU3039 controller ic is designed to provide a syn- chronous buck regulator and is targeted for applications where the cost and size is critical. the APU3039 oper- ates with a single input supply up to 18v. the output voltage can be programmed as low as 0.8v for low volt- age applications. selectable current limit is provided to tailor to external mosfet?s on-resistance for optimum cost and performance. the APU3039 features an uncom- mitted error amplifier for tracking output voltage and is capable of sourcing or sinking current for applications such as ddr bus termination. this device features a programmable switching frequency set from 200khz to 400khz, under-voltage lockout for both vcc and vc supplies, an external programmable soft-start function as well as output under-voltage detec- tion that latches off the device when an output short is detected. current limit using lower mosfet sensing using the 6v internal regulator for charge pump circuit allows single supply operation up to 18v programmable switching frequency up to 400khz soft-start function 0.8v precision reference voltage available uncommitted error amplifier available for ddr voltage tracking applications stable with ceramic capacitor features synchronous pwm controller with over current protection applications ddr memory v ddq /v tt applications graphic card hard disk drive netcom on-board dc to dc regulator application output voltage as low as 0.8v low cost on-board dc to dc rohs compliant technology licensed from international rectifier figure 1 - typical application of APU3039 . typical application APU3039 u1 vcc vc hdrv ldrv fb gnd comp ss / sd c3 1uf c7 0.1uf c8 5600pf r1 14k q1 ap9408agh q2 ap9412agh l2 4.7uh l1 1uh c2 3x 15uf 25v c1 15uf 3.3v @ 8a c6 2x 330uf 40m [ rt 18v ocset v out2 c5 0.1uf d1 r2 pgnd r3 r4 1k v ref v p 3.16k 5.76k c4 1uf c9 1uf c11 optional d2 package order information t a (c) device package 0 to 70 APU3039vn 20-pin vqfn 5x5 0 to 70 APU3039m 14-pin plastic soic nb 200806024 electronics corp. advanced power
APU3039 2 absolute maximum ratings vcc supply voltage .................................................. -0.5v to 25v vc supply voltage .................................................... -0.5v to 25v storage temperature range ...................................... -65 o c t o 150 o c operating junction temperature range ..................... 0 o c t o 125 o c caution: stresses above those listed in "absolute maximum ratings" may cause permanent damage to the device. parameter sym test condition min typ max units feedback voltage fb voltage initial accuracy fb voltage line regulation reference voltage ref voltage initial accuracy drive current uvlo uvlo threshold - vcc uvlo hysteresis - vcc uvlo threshold - vc uvlo hysteresis - vc uvlo threshold - fb supply current vcc dynamic supply current vc dynamic supply current vcc static supply current vc static supply current 4.75v APU3039 figure 2 - simplified block diagram of the APU3039. block diagram pin descriptions output of internal regulator. the output is protected for short circuit. a high frequency capacitor is recommended to be connected from this pin to ground. this pin is connected to the drain of the lower mosfet via an external resister and it provides the positive sensing for the internal current sensing circuitry. the external resis- tor programs the current limit threshold depending on the r ds(on) of the power mosfet. an external capacitor can be placed in parallel with the programming resistor to provide high frequency noise filtering. this pin provides soft-start for the switching regulator. an internal current source charges an external capacitor that is connected from this pin to ground which ramps up the output of the switching regulator, preventing it from overshooting as well as limiting the input current. the converter can be shutdown by pulling this pin down below 0.4v. compensation pin of the error amplifier. an external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. this pin is connected directly to the output of the switching regulator via resistor divider to provide feedback to the error amplifier. non-inverting input of error amplifier. no connection. pin# pin symbol pin description 15 16 17 18 19 20 2,3,5, 11,13,14 v out2 ocset ss / sd comp fb v p nc 22ua 64ua max por oscillator error amp ct error comp reset dom por 0.4v fblo comp vc hdrv vcc ldrv pgnd vcc 4v vc 3.5v 0.2v 0.2v bias generator 3v 1.25v por ss / sd fb comp 25k 25k 3v r s q rt gnd rt 17 19 18 12 10 9 6 7 8 oc comp ocset 3v 28ua regulator 6v v out2 16 15 v ref 1.25v 1 v p 20 enbl 4 0.8v electronics corp. advanced power APU3039 5 theory of operation introduction the APU3039 is a fixed frequency, voltage mode syn- chronous controller and consists of a precision refer- ence voltage, an uncommitted error amplifier, an internal oscillator, a pwm comparator, an internal regulator, a comparator for current limit, gate drivers, soft-start and shutdown circuits (see block diagram). the output voltage of the synchronous converter is set and controlled by the output of the error amplifier; this is the amplified error signal from the sensed output voltage and the voltage on non-inverting input of error amplifier(v p ). this voltage is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulses of variable duty-cycle, which drives the two n-channel ex- ternal mosfets. the timing of the ic is provided through an internal oscil- lator circuit which uses on-chip capacitor. the oscilla- tion frequency is programmable between 200khz to 400khz by using an external resistor. figure 14 shows switching frequency vs. external resistor (rt). soft-start the APU3039 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. to ensure correct start-up, the soft-start se- quence initiates when the vc and vcc rise above their threshold (3.4v and 4.4v respectively) and generates the power on reset (por) signal. soft-start function operates by sourcing an internal current to charge an external capacitor to about 3v. initially, the soft-start func- tion clamps the e/a?s output of the pwm converter and disables the short circuit protection. during the power up, the output starts at zero and voltage at fb is below 0.4v. the feedback uvlo is disabled during this time by injecting a current (64 a) into the fb. this generates a voltage about 1.6v (64 ax 25k) across the negative input of e/a and positive input of the feedback uvlo comparator (see figure 3). figure 3 - soft-start circuit for APU3039. the magnitude of this current is inversely proportional to the voltage at soft-start pin. the 20 a current source starts to charge up the exter- nal capacitor. in the mean time, the soft-start voltage ramps up, the current flowing into fb pin starts to de- crease linearly and so does the voltage at the positive pin of feedback uvlo comparator and the voltage nega- tive input of e/a. when the soft-start capacitor is around 1v, the current flowing into the fb pin is approximately 32 a. the volt- age at the positive input of the e/a is approximately: the e/a will start to operate and the output voltage starts to increase. as the soft-start capacitor voltage contin- ues to go up, the current flowing into the fb pin will keep decreasing. because the voltage at pin of e/a is regu- lated to reference voltage 0.8v, the voltage at the fb is: 32a x 25k = 0.8v v fb = 0.8-25k x (injected current) 20ua 64ua max por error amp 64ua 3 25k=1.6v when ss=0 por 0.4v feeback uvlo comp ss/sd fb comp 25k 0.8v 25k hdrv ldrv 3v electronics corp. advanced power APU3039 6 soft-start voltage voltage at negative input of error amp and feedback uvlo comparator voltage at fb pin current flowing into fb pin 64ua 0ua 0v 0.8v 1.6v 0.8v 0v 3v 2v 1v output of uvlo por c ss 20 a x t start /1v 20 a x t start /c ss = 2v-1v the feedback voltage increases linearly as the injecting current goes down. the injecting current drops to zero when soft-start voltage is around 2v and the output volt- age goes into steady state. as shown in figure 4, the positive pin of feedback uvlo comparator is always higher than 0.4v, therefore, feed- back uvlo is not functional during soft-start. figure 4 - theoretical operational waveforms during soft-start. the output start-up time is the time period when soft- start capacitor voltage increases from 1v to 2v. the start- up time will be dependent on the size of the external soft-start capacitor. the start-up time can be estimated by: for a given start up time, the soft-start capacitor can be estimated as: internal regulator the regulator powers directly from vcc and generates a regulated voltage (6v @ 40ma). the output is protected for short circuit. this voltage can be used for charge pump circuitry as shown in figure 1. supply voltage under-voltage lockout the under-voltage lockout circuit assures that the mosfet driver outputs remain in the off state whenever the supply voltage drops below set parameters. lockout occurs if vc or vcc fall below 3.4v and 4.4v respec- tively. normal operation resumes once vc and vcc rise above the set values. v ocset = i ocset x r set -r ds(on) x i l ---(1) shutdown the converter can be shutdown by pulling the soft-start pin below 0.4v. the control mosfet turns off and the synchronous mosfet turns on during shutdown. over-current protection over-current protection is achieved with a cycle by cycle scheme and it is performed by sensing current through the r ds(on) of low side mosfet. as shown in figure 5, an external resistor (r set ) is connected between ocset pin and the drain of low side mosfet (q2) and sets the current limit set point. the internal current source devel- ops a voltage across r set . when the low side switch is turned on, the inductor current flows through the q2 and results a voltage which is given by: figure 5 - diagram of the over current sensing. when voltage v ocset is below zero, the current sensing comparator flips and disables the oscillator. the high side mosfet is turned off and the low side mosfet is turned on until the inductor current reduces to below current set value. the critical inductor current can be calculated by setting: if the over-current condition is temporary and goes away quickly, the APU3039 will resume its normal operation. if output is shorted or over-current condition persists, the output voltage will keep going down until it is below 0.4v. then the output under-voltage lock out comparator goes high and turns off both mosfets. the operation waveforms are shown in figure 6. l1 r set APU3039 ocset i ocset v out osc q1 q2 i set = i l(critical) = ---(2) r set x i ocset r ds(on) v ocset = i ocset x r set - r ds(on) x i l = 0 electronics corp. advanced power APU3039 7 figure 6 - diagram of over-current operation. operation in current limit is shown in figure 7, the high side mosfet is turned off and inductor current starts to decrease. because the output inductor current is higher than the current limit setpoint (i set ), the over-current com- parator keeps high until the inductor current decreases to be below i set . then another cycle starts. during over-current mode, the valley inductor current is: the peak inductor current is given as: to avoid undesirable trigger of over-current protection, this relationship must be satisfied: figure 7 - operation waveforms during current limit. i l(valley) = i set from figure 7, the average inductor current during the current limit mode is: the inductor's ripple current can be expressed as: combination of above equation and (4) results in: combination of equations (5) and (2) results in the rela- tionship between r set and output current limit. from the above analysis, the current limit is not only dependent on the current setting resistor r set and r ds(on) of low side mosfet but it is also dependent on the input voltage, output voltage, inductance and switching frequency as well. the cycle-by-cycle over-current limit will hold for a cer- tain amount of time, until the output voltage drops below 0.4v, the under-voltage lock out activates and latches off the output driver. the operation waveform is shown in figure 7. normal operation will resume after APU3039 is powered up again. i l(peak) = i set +(v in -v out ) x t on /l ---(3) i set =i l(valley) i l(peak) t on t off i l(avg) current limit comparator output inductor current hdrv feedback voltage switching frequency high side mosfet turn on time (t on ) average inductor current i out i out i out i out d max /f s(nom) f s(nom) 0.4v v ref =i out normal operation over current limit mode shutdown by uvlo i o(lim) i o(max) v out f s(nom) 3 v in i set / i o(nom) - i pk-pk(nom) 2 i set = i o(lim) - ---(5) (v in -v out )xv out 2 x f s x l x v in ( ) r set = x i o(lim) - ---(6) r ds(on) i ocset [ ( )] (v in -v out )xv out 2 x f s x l x v in where: i o(lim) = the output current limit. typical is 50% higher than nominal output current v in = maximum input voltage v out = output voltage f s = switching frequency l = output inductor r ds(on) = r ds(on) of low side mosfet i ocset = oc threshold set current (v in - v out ) x v out v in x l x f s i pk-pk(lim) = i o(lim) = i set + ---(4) i pk-pk(lim) 2 electronics corp. advanced power APU3039 8 application information design example: the following example is a typical application for APU3039, the schematic is figure 17 on page 16. output voltage programming output voltage is programmed by reference voltage and external voltage divider. the fb pin is the inverting input of the error amplifier, which is referenced to the voltage on non-inverting pin of error amplifier. for this applica- tion, this pin (v p ) is connected to reference voltage (v ref ). the output voltage is defined by using the following equa- tion: when an external resistor divider is connected to the output as shown in figure 8. figure 8 - typical application of the APU3039 for programming the output voltage. equation (7) can be rewritten as: choose r 5 = 1k this will result to r 6 = 3.16k if the high value feedback resistors are used, the input bias current of the fb pin could cause a slight increase in output voltage. the output voltage set point can be more accurate by using precision resistor. soft-start programming the soft-start timing can be programmed by selecting the soft-start capacitance value. the start-up time of the converter can be calculated by using: for a start-up time of 5ms, the soft-start capacitor will be 0.1 f. choose a ceramic capacitor at 0.1 f. boost supply vc to drive the high side switch, it is necessary to supply a gate voltage at least 4v grater than the bus voltage. this is achieved by using a charge pump configuration as shown in figure 9. this method is simple and inexpen- sive. the operation of the circuit is as follows: when the lower mosfet is turned on, the capacitor (c1) is pulled down to ground and charges, up to v out2 value, through the diode (d1). the bus voltage will be added to this voltage when upper mosfet turns on in next cycle, and providing supply voltage (vc) through diode (d2). vc is approximately: capacitors in the range of 0.1 f and 1 f are generally adequate for most applications. the diode must be a fast recovery device to minimize the amount of charge fed back from the charge pump capacitor into v out2 . the diodes need to be able to block the full power rail volt- age, which is seen when the high side mosfet is switched on. for low voltage application, schottky di- odes can be used to minimize forward drop across the diodes at start up. figure 9 - charge pump circuit. input capacitor selection the input filter capacitor should be based on how much ripple the supply can tolerate on the dc input line. the ripple current generated during the on time of upper mosfet should be provided by input capacitor. the rms value of this ripple is expressed by: v out = v p x 1 + ---(7) r 6 r 5 v p = v ref = 0.8v ( ) r 6 = r 5 x - 1 v out v p ( ) fb APU3039 v out r 5 r 6 v ref v p vc v out2 + v bus - (v d1 + v d2 ) v in = 18v v out = 3.3v i out = 8a v out = 100mv (output voltage ripple 3% of v out ) f s = 200khz l2 APU3039 d1 c1 vc hdrv regulator q1 q2 v out2 c2 v bus d2 c3 css 20 x t start (f) ---(8) where t start is the desired start-up time (ms) electronics corp. advanced power APU3039 9 for higher efficiency, a low esr capacitor is recom- mended. choose three poscap from sanyo 25tqc15m (25v, 15f, 90m[) with a maximum allowable ripple current of 3a. inductor selection the inductor is selected based on operating frequency, transient performance and allowable output voltage ripple. low inductor value results to faster response to step load (high i/ t) and smaller size but will cause larger output ripple due to increase of inductor ripple current. as a rule of thumb, select an inductor that produces a ripple current of 10-40% of full load dc. for the buck converter, the inductor value for desired operating ripple current can be determined using the fol- lowing relation: if i = 37%(i o ), then the output inductor will be: the coilcraft do5022hc series provides a range of in- ductors in different values, low profile suitable for large currents, 4.7 h, 13a is a good choice for this applica- tion. this will result to a ripple approximately 37% of output current. output capacitor selection the criteria to select the output capacitor is normally based on the value of the effective series resistance (esr). in general, the output capacitor must have low enough esr to meet output ripple and load transient l = 4.65 h 2 2 p cond (upper switch) = i loadx r ds(on)x dx p cond (lower switch) = i loadx r ds(on)x (1 - d)x = r ds(on) temperature dependency for v in =20v, i out =8a and d=0.165, the i rms =3a i rms = i out d(1-d) ---(9) where: d is the duty cycle, d=v out /v in. i rms is the rms value of the input capacitor current. i out is the output current for each channel. v in - v out = lx ; t = d x ; d = 1 f s v out v in i t l = (v in - v out ) x ---(11) v out v inx ixf s where: v in = maximum input voltage v out = output voltage i = inductor ripple current f s = switching frequency t = turn on time d = duty cycle where: v o = output voltage ripple i = inductor ripple current v o = 100mv and i 40% of 8a = 3.2a this results to: esr=31m [ esr [ ---(10) v o i o requirements, yet have high enough esr to satisfy sta- bility requirements. the esr of the output capacitor is calculated by the following relationship: the sanyo tpc series, poscap capacitor is a good choice. the 6tpc330m, 330f, 6.3v has an esr 40m[. se- lecting two of these capacitors in parallel, results to an esr of 20m ohm which achieves our low esr goal. the capacitor value must be high enough to absorb the inductor's ripple current. the larger the value of capaci- tor, the lower will be the output ripple voltage. power mosfet selection the APU3039 uses two n-channel mosfets. the se- lections criteria to meet power transfer requirements is based on maximum drain-source voltage (v dss ), gate- source drive voltage (v gs ), maximum output current, on- resistance r ds(on) and thermal management. the mosfet must have a maximum operating voltage (v dss ) exceeding the maximum input voltage (v in ). the gate drive requirement is almost the same for both mosfets. logic-level transistor can be used and cau- tion should be taken with devices at very low v gs to pre- vent undesired turn-on of the complementary mosfet, which results a shoot-through current. the total power dissipation for mosfets includes con- duction and switching losses. for the buck converter, the average inductor current is equal to the dc load cur- rent. the conduction loss is defined as: the r ds(on) temperature dependency should be consid- ered for the worst case operation. this is typically given in the mosfet data sheet. ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget. electronics corp. advanced power APU3039 10 choose ap9408agh for control mosfet and ap9412agh for synchronous mosfet. these devices provide low on-resistance in a compact to-252 package. the mosfets have the following data: the total conduction losses will be: the switching loss is more difficult to calculate, even though the switching transition is well understood. the reason is the effect of the parasitic components and switching times during the switching procedures such as turn-on / turnoff delays and rise and fall times. the control mosfet contributes to the majority of the switch- ing losses in synchronous buck converter. the synchro- nous mosfet turns on under zero voltage conditions, therefore, the turn on losses for synchronous mosfet can be neglected. with a linear approximation, the total switching loss can be expressed as: the switching time waveform is shown in figure 10. figure 10 - switching time waveforms. from ap9408agh data sheet we obtain: these values are taken under a certain condition test. for more details please refer to the ap9408agh and ap9412agh data sheets. by using equation (12), we can calculate the total switch- ing losses. programming the over-current limit the over-current threshold can be set by connecting a resistor (r set ) from drain of low side mosfet to the ocset pin. the resistor can be calculated by using equa- tion (2). the r ds(on) has a positive temperature coefficient and it should be considered for the worse case operation. feedback compensation the APU3039 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. to achieve fast transient response and accurate output regulation, a compensa- tion circuit is necessary. the goal of the compensation network is to provide a closed loop transfer function with the highest 0db crossing frequency and adequate phase margin (greater than 45 ?c ). the output lc filter introduces a double pole, ?40db/ decade gain slope above its corner resonant frequency, and a total phase lag of 180 ?c (see figure 11). the reso- nant frequency of the lc filter is expressed as follows: figure 11 shows gain and phase of the lc filter. since we already have 180 ?c phase shift just from the output filter, the system risks being unstable. figure 11 - gain and phase of lc filter. p con(total) = p con(upper) + p con(lower) p con(total) = 0.64w p sw(total) = 150mw ap9408agh v dss = 30v i d = 53a r ds(on) = 10m[ ap9412agh v dss = 30v i d = 68a r ds(on) = 6m[ where: v ds(off) = drain to source voltage at off time t r = rise time t f = fall time t = switching period i load = load current p sw = x i load ---(12) x v ds(off) 2 t r + t f t ap9408 agh t r = 5ns t f = 6ns f lc = ---(13) 2 x l o x c o 1 r ds(on) = 8m[ x 1.5 = 12m[ i set i o(lim) = 8a x 1.5 = 12a (50% over nominal output current) this results to: r set = 5.76k [ v ds v gs 10% 90% t d (on) t d (off) t r t f gain f lc 0db phase 0 ?c f lc -180 ?c frequency frequency -40db/decade electronics corp. advanced power APU3039 11 the APU3039?s error amplifier is a differential-input transconductance amplifier. the output is available for dc gain control or ac phase compensation. the e/a can be compensated with or without the use of local feedback. when operated without local feedback, the transconductance properties of the e/a become evi- dent and can be used to cancel one of the output filter poles. this will be accomplished with a series rc circuit from comp pin to ground as shown in figure 12. note that this method requires that the output capacitor should have enough esr to satisfy stability requirements. in general, the output capacitor?s esr generates a zero typically at 5khz to 50khz which is essential for an acceptable phase margin. the esr zero of the output capacitor expressed as fol- lows: figure 12 - compensation network without local feedback and its asymptotic gain plot. the transfer function (ve / v out ) is given by: the (s) indicates that the transfer function varies as a function of frequency. this configuration introduces a gain and zero, expressed by: |h(s)| is the gain at zero cross frequency. first select the desired zero-crossover frequency (fo): use the following equation to calculate r 4 : where: v in = maximum input voltage v osc = oscillator ramp voltage fo = crossover frequency f esr = zero frequency of the output capacitor f lc = resonant frequency of the output filter r 5 and r 6 = resistor dividers for output voltage programming g m = error amplifier transconductance this results to r 4 =12.08k choose r 4 =14k to cancel one of the lc filter poles, place the zero be- fore the lc filter resonant frequency pole: using equations (17) and (19) to calculate c 9 , we get: one more capacitor is sometimes added in parallel with c 9 and r 4 . this introduces one more pole which is mainly used to suppress the switching noise. the additional pole is given by: the pole sets to one half of switching frequency which results in the capacitor c pole: c 9 5300pf; choose c 9 =5600pf v out vp=v ref r 5 r 6 r 4 c 9 ve e/a f z h(s) db frequency gain(db) fb comp f esr = ---(14) 1 2 x esr x co h(s) = g m x x ---(15) ( ) r 5 r 6 + r 5 1 + sr 4 c 9 sc 9 f lc = 2.8khz r 5 = 1k r 6 = 3.16k g m = 700 mho for: v in = 18v v osc = 1.25v fo = 20khz f esr = 12khz r 4 = x x x ---(18) foxf esr f lc 2 v osc v in r 5 + r 6 r 5 1 g m fo > f esr and f o [ (1/5 ~ 1/10) x f s for: lo = 4.7 h co = 660 f f z 75%f lc f z 0.75x 1 2 l o x c o ---(19) f z = 2.1khz r 4 = 14k f p = 2 x r 4 x 1 c 9x c pole c 9 + c pole c pole = for f p << f s 2 1 x r 4 x f s x r 4 x f s - 1 1 c 9 f z = ---(17) 1 2 xr 4x c 9 |h(s=jx2xf o )| = g m x x r 4 ---(16) r 5 r 6x r 5 electronics corp. advanced power APU3039 12 for a general solution for unconditionally stability for ceramic capacitor with very low esr and any type of output capacitors, in a wide range of esr values we should implement local feedback with a compensation network. the typically used compensation network for voltage-mode controller is shown in figure 13. figure 13 - compensation network with local feedback and its asymptotic gain plot. in such configuration, the transfer function is given by: the error amplifier gain is independent of the transcon- ductance under the following condition: by replacing z in and z f according to figure 9, the trans- former function can be expressed as: as known, transconductance amplifier has high imped- ance (current source) output, therefore, consider should be taken when loading the e/a output. it may exceed its source/sink output current capability, so that the ampli- fier will not be able to swing its output voltage over the necessary range. the compensation network has three poles and two ze- ros and they are expressed as follows: cross over frequency: the stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. the consideration has been taken to satisfy condition (20) regarding transconduc- tance error amplifier. these design rules will give a crossover frequency ap- proximately one-tenth of the switching frequency. the higher the band width, the potentially faster the load tran- sient speed. the gain margin will be large enough to provide high dc-regulation accuracy (typically -5db to - 12db). the phase margin should be greater than 45 8 for overall stability. based on the frequency of the zero generated by esr versus crossover frequency, the compensation type can be different. the table below shows the compensation type and location of crossover frequency. v out vp=v ref r 5 r 6 r 8 c 10 c 12 c 11 r 7 ve f z 1 f z 2 f p 2 f p 3 e/a z f z in frequency gain(db) h(s) db fb comp h(s) = 1+sr 7 x (1+sr 8 c 10 ) (1+sr 7 c 11 ) x [1+sc 10 (r 6 +r 8 )] x [ ( )] 1 sr 6 (c 12 +c 11 ) c 12 c 11 c 12 +c 11 g m z f >> 1 and g m z in >>1 ---(20) 1 - g m z f 1 + g m z in v e v out = where: v in = maximum input voltage v osc = oscillator ramp voltage lo = output inductor co = total output capacitors f o = r 7 x c 10 x x v in v osc 1 2 x lo x co ---(21) f p1 = 0 1 2 x c 10 x (r 6 + r 8 ) f z2 = 1 2 x c 10 x r 6 f z1 = 1 2 x r 7 x c 11 f p3 = 1 2x r 7 x 1 2 x r 7 x c 12 f p2 = 1 2 x r 8 x c 10 ( ) c 12 x c 11 c 12 + c 11 detail information is dicussed in application note an- 1043 which can be downloaded from the ir web-site. compensator type type ii (pi) type iii (pid) method a type iii (pid) method b location of zero crossover frequency (f o ) f po < f zo < f o < f s /2 f po < f o < f zo < f s /2 f po < f o < f s /2 < f zo typical output capacitor electrolytic, tantalum tantalum, ceramic ceramic table - the compensation type and location of zero crossover frequency. electronics corp. advanced power APU3039 13 layout consideration the layout is very important when designing high fre- quency switching converters. layout will affect noise pickup and can cause a good design to perform with less than expected results. start to place the power components. make all the con- nections in the top layer with wide, copper filled areas. the inductor, output capacitor and the mosfet should be close to each other as possible. this helps to reduce the emi radiated by the power traces due to the high switching currents through them. place input capacitor directly to the drain of the high-side mosfet. to reduce figure 14 - switching frequency versus resistor. the esr, replace the single input capacitor with two par- allel units. the feedback part of the system should be kept away from the inductor and other noise sources and be placed close to the ic. in multilayer pcb, use one layer as power ground plane and have a separate control circuit ground (analog ground), to which all sig- nals are referenced. the goal is to localize the high cur- rent path to a separate loop that does not interfere with the more sensitive analog control function. these two grounds must be connected together on the pc board layout at a single point. 200 250 300 350 400 450 0 50 100 150 200 250 300 350 400 450 rt (k ) frequency (khz) electronics corp. advanced power APU3039 14 typical application figure 15 - typical application of the APU3039 with two input supplies. APU3039 u1 vcc vc hdrv ldrv fb gnd comp ss / sd c3 1uf c7 0.1uf c8 2200pf r1 28k q1 ap9408agh q2 ap9412agh l2 3.3uh l1 1uh c2 2x 150uf c1 47uf v out 2.5v @ 10a c6 2x 330uf, 40m[ rt 5v ocset v out2 c4 1uf r2 pgnd r3 r4 1k v ref v p +12v 7.12k 2.15k d1 electronics corp. advanced power APU3039 15 typical application figure 16 - typical application of APU3039 for ddr memory when APU3039 generates v core and apu3038 generates the termination voltage. APU3039 u1 c1 1uf c2 1uf c6 0.1uf c8 4.7nf r2 27k q1 ap9408agh q1 ap9412agh l2 l1 1uh c3 2x 100uf, 55m [ 10tpb100m c4 47uf v ddq 1.8v @ 5a c7 2x 330uf, 40m [ 6tpc330m 12v 5v apu3038 u2 vcc vc hdrv ldrv fb comp ss / sd c9 1uf c10 1uf c12 0.15uf c14 5.6nf r6 13k q2 ap9408agh q2 ap9412agh l3 4.7uh v tt (0.9v @ 3a) c13 2x 330uf, 40m [ 6tpc330m 12v pgnd rt v p v ref 5v 5v r1 1.25k r3 1k r4 1k r5 1k 4.7uh c11 100uf, 55m [ 10tpb100m v out2 d2 d1 gnd comp rt ss / sd v p v ref vcc vc hdrv ocset ldrv pgnd fb 8k r7 gnd electronics corp. advanced power APU3039 16 demo-board application 18v to 3.3v @ 8a ref desig description value qty part# manuf web site (www.) 1 1 1 1 1 1 1 4 3 1 1 2 3 1 1 1 1 1 1 q1 q2 u1 d1 d2 l1 l2 c1,c2a,b,c c5,6,10 c7 c8 c9a,b c3,11,12 c13 r4 r7 r8 r9 r10 mosfet mosfet controller schottky diode schottky diode inductor inductor cap, poscap capacitor capacitor capacitor capacitor capacitor capacitor resistor resistor resistor resistor resistor ap9408agh ap9412agh APU3039 bat54s bat54 ds1608c-102 do5022p-472hc 25tqc15m ecj-2vf1e104z ecu-v1h562kbg ecj-2vc1h471j 6tpb-330m ecj-2vf1c105z ecj-3yb1e105k apec apec apec ir ir coilcraft coilcraft sanyo panasonic panasonic panasonic sanyo panasonic panasonic a-power.com.tw coilcraft.com sanyo.com maco.panasonic.co.jp sanyo.com maco.panasonic.co.jp 30v, 10m[, 53a 30v, 6m[ , 68a synchronous pwm fast switching fast switching 1 h, 3a 4.7 h, 13a 15 f, 25v 0.1 f, y5v, 25v 5600pf, x7r, 50v 470pf, x7r, 50v 330uf, 40m[ 1 f, y5v, 16v 1 f, x7r, 25v 5.76k 14k 4.7[ 3.16k 1k figure 17 - demo-board application of the APU3039. parts list APU3039 u1 vcc vc hdrv ldrv fb gnd comp ss / sd c11 1uf c6 0.1uf c7 5600pf r7 14k q1 ap9408agh q2 ap9412agh l2 4.7uh l1 1uh c2a,b,c 3x 15uf 25v c1 15uf 3.3v @ 8a c9a,b 2x 330uf 40m [ rt 18v ocset v out2 c5 0.1uf d1 r4 pgnd r9 r10 1k v ref v p 3.16k 5.76k c13 1uf c8 470pf r8 4.7 [ d2 c3 1uf c12 1uf c10 0.1uf electronics corp. advanced power APU3039 17 typical operating characteristics test conditions: v in =20v, v out =3.3v, i out =0-8a, fs=200khz figure 19 - soft-start pin grounded. ch1: hdrv, ch2: ldrv figure 21 - output ripple. ch1: output ripple, ch2: hdrv, ch3: ldrv, ch4: inductor current figure 18 - normal condition at no load. ch1: hdrv, ch2: ldrv, ch4: inductor current figure 20 - soft-start. ch1: v in , ch2: v out , ch3: v out2 , ch4: vss electronics corp. advanced power APU3039 18 typical operating characteristics test conditions: v in =20v, v out =3.3v, i out =0-8a, fs=200khz figure 23 - load transient response ch1: v out , ch3: output current 0a 8a figure 22 - output shorted at start up. ch1: v out , ch3: vss, ch4: inductor current figure 24 - efficiency measurement. v in =20v, v out =3.3v 70 72 74 76 78 80 82 84 86 88 90 01234567891011 output current (a) efficiency (%) electronics corp. advanced power APU3039 19 figure 26 - frequency vs.temperature f s =200khz figure 25 - v ref vs.temperature figure 28 - v out2 vs.temperature typical performance characteristics for all charts: vc=vcc=12v, 20v, 24v note: data are taken with few samples to indicate the variation of these parameters over the wide temperature range. figure 30 - deadtime, sync fet drive rising time vs.temperature f s =400khz, c load =3300pf figure 29 - frequency vs.temperature f s =400khz figure 27 - deadtime, control fet drive rising time vs.temperature f s =400khz, c load =3300pf 0.793 0.794 0.795 0.796 0.797 0.798 0.799 0.8 0.801 0.802 -45 -10 25 60 95 130 temperature (c) vref (v) 12 volt 20 volt 24 volt 204 205 206 207 208 209 210 211 212 213 214 215 -45 -10 25 60 95 130 temperature (c) frequency (khz) 12 volt 20 volt 24 volt 0 50 100 150 200 -45 -10 25 60 95 130 temperature (c) deadtime, switch fet drive rising time (ns) 12 volts 20 volts 24 volts 5.8 5.85 5.9 5.95 6 6.05 6.1 6.15 6.2 -45 -10 25 60 95 130 temperature (c) vout2 (v) 12 volt 20 volt 24 volt 385 390 395 400 405 410 -45 -10 25 60 95 130 temperature (c) frequency (khz) 12 volt 20 volt 24 volt 0 50 100 150 200 -45 -10 25 60 95 130 temperature (c) deadtime, sync fet drive rising time (ns) 12 volts 20 volts 24 volts electronics corp. advanced power APU3039 20 figure 31 - control fet drive rise time vs.temp. f s =400khz, c load =3300pf figure 33 - control fet drive fall time vs.temp. f s =400khz, c load =3300pf figure 34 - sync fet drive fall time vs.temp. f s =400khz, c load =3300pf figure 32 - sync fet drive rise time vs.temp. f s =400khz, c load =3300pf typical performance characteristics for all charts: vc=vcc=12v, 20v, 24v note: data are taken with few samples to indicate the variation of these parameters over the wide temperature range. 0 20 40 60 80 100 120 140 160 180 200 -45 -10 25 60 95 130 temperature (c) control fet drive rise time (ns) 12 volts 20 volts 24 volts 0 20 40 60 80 100 120 140 160 180 200 -45 -10 25 60 95 130 temperature (c) sync fet drive rise time (ns) 12 volts 20 volts 24 volts 0 20 40 60 80 100 120 140 160 180 200 -45 5 55 105 155 temperature (c) control fet drive fall time (ns) 12 volts 20 volts 24 volts 0 2 4 6 8 10 12 14 16 18 20 -45 -10 25 60 95 130 temperature (c) sync fet drive time (ns) 12 volts 20 volts 24 volts electronics corp. advanced power package outline : sop-14 millimeters min nom max a 1.47 1.60 1.73 a1 0.10 __ 0.25 a2 __ 1.45 __ b 0.33 0.41 0.51 c 0.19 0.20 0.25 d 8.53 8.64 8.74 e 5.79 5.99 6.20 e1 3.81 3.91 3.99 e __ 1.27 __ l 0.40 0.71 1.27 __ __ 0.076 0 __ 8 1.all dimensions are in millimeters. 2.dimension does not include mold protrusions. part marking information & packing : sop-14 y advanced power electronics corp. symbols u3039m ywwsss package code part number date code (ywwsss) y last digit of the year ww week sss sequence 21 package outline : vqfn min nom max a 0.80 0.90 1.00 a1 b c 0.19 0.20 0.25 d 4.90 5.00 5.10 d2 3.70 3.80 3.90 e 4.90 5.00 5.10 e2 3.70 3.80 3.90 e__ 0.65 __ l 0.35 0.40 0.45 y 0.00 __ 0.076 u3039vn package code 22 |
Price & Availability of APU3039
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |